Comtech-ef-data DD240XR Rev Е Manuel d'utilisateur

DD240XR High-Speed Digital Demodulator Installation and Operation Manual MN-DD240XR Revision E Comtech EF Da

DD240XR High-Speed Digital Demodulator x MN-DD240XR – Rev. E

Electrical Interfaces DD240XR High-Speed Digital Demodulator 5-12 MN-DD240XR – Rev. E ETH LINK: {Pass, Fail, Unmasked/Masked} Fail indicates th

DD240XR High-Speed Digital Demodulator Electrical Interfaces MN-DD240XR – Rev. E 5-13 TEST - The following new items are available under the Test

Electrical Interfaces DD240XR High-Speed Digital Demodulator 5-14 MN-DD240XR – Rev. E

DD240XR High-Speed Digital Demodulator Maintenance MN-DD240XR – Rev. E 6-1 Maintenance 6 6.0 Periodic Maintenance The DD240XR contains a L

Maintenance DD240XR High-Speed Digital Demodulator 6-2 TM115 – Rev. 1.2

DD240XR High-Speed Digital Demodulator Technical Specifications TM115 – Rev. 1.2 7-1 Technical Specifications 7 7.0 Introduction This section d

Technical Specifications DD240XR High-Speed Digital Demodulator 7-2 MN-DD240XR – Rev. E Forward Error Correction (FEC) Decoding Inner Code: PTCM (

DD240XR High-Speed Digital Demodulator Technical Specifications MN-DD240XR – Rev. E 7-3 7.4.1 Configuration Series DVB-S2 Series 100: 2 - 10

DD240XR High-Speed Digital Demodulator Introduction MN-DD240XR – Rev. E 1-1 Introduction 1 1.0 Description Radyne Corporation’s DD240XR fam

Technical Specifications DD240XR High-Speed Digital Demodulator 7-4 MN-DD240XR – Rev. E 7.7 Environmental Prime Power 100 to 240 VAC, 50 to 60

DD240XR High-Speed Digital Demodulator Technical Specifications MN-DD240XR – Rev. E 7-5 7.11 BER Performance (DVB-S2) Per EN 302-307 V1.1.2 Typi

Technical Specifications DD240XR High-Speed Digital Demodulator 7-6 MN-DD240XR – Rev. E Series 350 (45 Msps Max) Modulation FEC MPEG Minimum

DD240XR High-Speed Digital Demodulator Technical Specifications MN-DD240XR – Rev. E 7-7 7.13 Data Rates (DVB-S2 with Pilots Off) Series 100 (10

Technical Specifications DD240XR High-Speed Digital Demodulator 7-8 MN-DD240XR – Rev. E Series 300 (45 Msps Max) Modulation FEC MPEG Frame Size Min

DD240XR High-Speed Digital Demodulator Technical Specifications MN-DD240XR – Rev. E 7-9 Series 350 (45 Msps Max) Modulation FEC MPEG Frame Size

Technical Specifications DD240XR High-Speed Digital Demodulator 7-10 MN-DD240XR – Rev. E

DD240XR High-Speed Digital Demodulator Glossary MN-DD240XR – Rev. E G-1 Glossary G A A Ampere AC Alternating Current ADC Analog to Digital Co

Glossary DD240XR High-Speed Digital Demodulator G-2 MN-DD240XR – Rev. E C C Celsius CATS Computer Aided Test Software CA/xxxx Cable Assembly CCM

DD240XR High-Speed Digital Demodulator Glossary MN-DD240XR – Rev. E G-3 F F Fahrenheit FAS Frame Acquisition Sync. A repeating series bits, wh

Introduction DD240XR High-Speed Digital Demodulator 1-2 MN-DD240XR – Rev. E

Glossary DD240XR High-Speed Digital Demodulator G-4 MN-DD240XR – Rev. E L LCD Liquid Crystal Display LDPC Low-Density Parity Check LED Light Emit

DD240XR High-Speed Digital Demodulator Glossary MN-DD240XR – Rev. E G-5 RF Radio Frequency ROM Read Only Memory rms Root Mean Square RU Rack U

DD240XR High-Speed Digital Demodulator Installation MN-DD240XR – Rev. E 2-1 Installation 2 2.0 Installation Requirements The DD240XR can be

Installation DD240XR High-Speed Digital Demodulator 2-2 MN-DD240XR – Rev. E 2.1 Unpacking The DD240XR Demodulator was carefully packaged to avoi

DD240XR High-Speed Digital Demodulator Installation MN-DD240XR – Rev. E 2-3 2.4 Demodulator Checkout The following descriptions assume that th

Installation DD240XR High-Speed Digital Demodulator 2-4 MN-DD240XR – Rev. E

DD240XR High-Speed Digital Demodulator Operation MN-DD240XR – Rev. E 3-1 Theory of Operation 3 3.0 Theory of Operation The basic theory of

Warranty Policy DD240 High-Speed Digital Video Demodulator 2

Operation DD240XR High-Speed Digital Demodulator 3-2 MN-DD240XR – Rev. E

DD240XR High-Speed Digital Demodulator User Interfaces TM115 – Rev. 1.2 4-1 User Interfaces 4 4.0 User Interfaces There are four User Interf

User Interfaces DD240XR High-Speed Digital Demodulator 4-2 MN-DD240XR – Rev. E 4.1.1 Front Panel LCD Display The Front Panel display is a 2 line

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-3 4.1.4 Front Panel LED Indicators Eight LEDs on the DD240XR Front

User Interfaces DD240XR High-Speed Digital Demodulator 4-4 MN-DD240XR – Rev. E Figure 4-2. DD240XR Main Programming Menu

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-5 Note: If at any time the user wishes to abort the changes being ma

User Interfaces DD240XR High-Speed Digital Demodulator 4-6 MN-DD240XR – Rev. E SAT FRAMING FECFRAME Select NORMAL n_ldpc = 64,800 or SHORT n_ld

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-7 The “Auto” Setting of Last Rate Control causes the last explicitly

User Interfaces DD240XR High-Speed Digital Demodulator 4-8 MN-DD240XR – Rev. E TERR FRAMING: {None, DVB 188, DVB 204} Terrestrial Framing – Al

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-9 EXC REF CLOCK: {1.000, 1.544, 2.000, 2.048, 5.000, 6.312, 8.44

Warranty Policy DD240XR High-Speed Digital Demodulator iii MN-DD240XR – Rev. E Warranty Policy WP Comtech EF Data products are warranted against d

User Interfaces DD240XR High-Speed Digital Demodulator 4-10 MN-DD240XR – Rev. E MODE SELECTION: UDP PACKETS: The Demodulator outputs seven M

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-11 Multicast Destination IP Addresses When the destination address

User Interfaces DD240XR High-Speed Digital Demodulator 4-12 MN-DD240XR – Rev. E PROG ETH FLASH: {PRESS CLEAR} The PROG ETH FLASH allows the use

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-13 This screen displays the ratio of mpeg packets with CRC errors t

User Interfaces DD240XR High-Speed Digital Demodulator 4-14 MN-DD240XR – Rev. E This menu is only visible when COP 3 RTP FEC is selected. This menu

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-15 DD240XR only displays buffer status and alarm prompts for terres

User Interfaces DD240XR High-Speed Digital Demodulator 4-16 MN-DD240XR – Rev. E This screen is used to enable/disable alarms when the demodulator

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-17 LATCHED ALARMS (Menu): This menu duplicates the Current Alarm

User Interfaces DD240XR High-Speed Digital Demodulator 4-18 MN-DD240XR – Rev. E The signal buffer has completely emptied and reset, since latched

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-19 Fail indicates the EDI has not received an ARP reply to its ARP re

DD240XR High-Speed Digital Video Demodulator Record of Revisions MN-DD240XR – Rev. E iv Before a warranty repair can be accomplished, a Repair Autho

User Interfaces DD240XR High-Speed Digital Demodulator 4-20 MN-DD240XR – Rev. E MENU NAVIGATION: {STANDARD, FLOATING} Standard: This setting

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-21 MODEM IP ADDR: {XXX.XXX.XXX.XXX} The IP Address of the modem.

User Interfaces DD240XR High-Speed Digital Demodulator 4-22 MN-DD240XR – Rev. E With no local router Mask: 255.255.000.000 Modem: 172.

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-23 for a SNMP host. Messages will only be sent if the unit has been

User Interfaces DD240XR High-Speed Digital Demodulator 4-24 MN-DD240XR – Rev. E AUTH PASSWORD: {16 characters} User1 reset value = View

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-25 User4 reset value = DES This is the encryption me

User Interfaces DD240XR High-Speed Digital Demodulator 4-26 MN-DD240XR – Rev. E TYPE: Terrestrial interface board type. BOARD ID: Display

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-27 The value indicates absolute count of data bits received since s

User Interfaces DD240XR High-Speed Digital Demodulator 4-28 MN-DD240XR – Rev. E Ethernet Data Interface will resolve the Destination MAC using ARP f

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-29 ST B0 B1 B2 B3 B4 B5 B6 B7 S1 ST, etc. The stop bit S1 is a mark.

DD240XR High-Speed Digital Demodulator Preface MN-DD240XR – Rev. E v Preface P This manual provides installation and operation information for t

User Interfaces DD240XR High-Speed Digital Demodulator 4-30 MN-DD240XR – Rev. E <DESTINATION ID> 2Ah = 00101010b 00011100b <FSN> 09h

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-31 To reiterate, valid equipment responses to a message require the F

User Interfaces DD240XR High-Speed Digital Demodulator 4-32 MN-DD240XR – Rev. E respond to the override simultaneously with different information, o

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-33 CDS-780 Clock Distribution System 06 SOM-340 Second Order Multipl

User Interfaces DD240XR High-Speed Digital Demodulator 4-34 MN-DD240XR – Rev. E If an acknowledgment (response) packet or a NAK packet is lost, corr

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-35 4.3.8 Remote Port Packet Structure The RLLP Remote Port Packet

User Interfaces DD240XR High-Speed Digital Demodulator 4-36 MN-DD240XR – Rev. E 4.3.9.1 Demodulator Command Set Queries Opcode Query Configuratio

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-37 Set time 2C04h Set date 2C05h Set Terrestrial Gig Ethernet Confi

User Interfaces DD240XR High-Speed Digital Demodulator 4-38 MN-DD240XR – Rev. E <1> <1> <1> <4> <1> <2>

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-39 <1> <4> <4> <1> Pilot S

Preface DD240XR High-Speed Digital Demodulator vi MN-DD240XR – Rev. E Trademarks Product names mentioned in this manual may be trademarks or regist

User Interfaces DD240XR High-Speed Digital Demodulator 4-40 MN-DD240XR – Rev. E <1> <1> <1> <1&

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-41 <1> <1> <2> <4> <4> <2>

User Interfaces DD240XR High-Speed Digital Demodulator 4-42 MN-DD240XR – Rev. E Opcode: <2406h> Query Latched alarms and Opcode: <2

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-43 Opcode: <240Eh> Query Time Response <1> <1>

User Interfaces DD240XR High-Speed Digital Demodulator 4-44 MN-DD240XR – Rev. E <4> <4> <16> Total Packets FEC Column Pa

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-45 Opcode: <2440h> Query Test Status Response <1> <

User Interfaces DD240XR High-Speed Digital Demodulator 4-46 MN-DD240XR – Rev. E Opcode: <2A0Fh> Set spectral inversion <1> Spectral I

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-47 Opcode: <2A45h> Clear Events No Parameters Opcode: &

User Interfaces DD240XR High-Speed Digital Demodulator 4-48 MN-DD240XR – Rev. E 4.5 DD240XR Management Information Base (MIB) All of the necessa

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-49 The first token will be converted into decimal based num

DD240XR High-Speed Digital Demodulator Table of Contents MN-DD240XR – Rev. E vii Table of Contents ToC Section 1 - Introduction ...

User Interfaces DD240XR High-Speed Digital Demodulator 4-50 MN-DD240XR – Rev. E SYNTAX INTEGER { none(0), viterbi1_2(1),

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-51 -- v35Om73(6), -- rs(7), -- rsEfData(8), --

User Interfaces DD240XR High-Speed Digital Demodulator 4-52 MN-DD240XR – Rev. E normal(1), inverted(2) } MAX-ACCESS re

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-53 MAX-ACCESS read-write STATUS current DESCRIPTION

User Interfaces DD240XR High-Speed Digital Demodulator 4-54 MN-DD240XR – Rev. E parallel(6), parallelM2P(7), parallelDVB(

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-55 -- STATUS current -- DESCRIPTION -- " -- Re

User Interfaces DD240XR High-Speed Digital Demodulator 4-56 MN-DD240XR – Rev. E 2.048 Mhz => DS1B 5 Mhz 6.312 Mhz =>

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-57 radTerrEthUdpPortDest OBJECT-TYPE SYNTAX INTEGER (0..

User Interfaces DD240XR High-Speed Digital Demodulator 4-58 MN-DD240XR – Rev. E " +12V monitor with implied decimal point.

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-59 SYNTAX INTEGER { invalidEbno(1), validEbno

Table of Contents DD240XR High-Speed Digital Demodulator viii MN-DD240XR – Rev. E 4.3.1 Protocol Structure _______________________________________

User Interfaces DD240XR High-Speed Digital Demodulator 4-60 MN-DD240XR – Rev. E " The estimated Bit Error Rate after the outs

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-61 ------------------------------------------------------------------

User Interfaces DD240XR High-Speed Digital Demodulator 4-62 MN-DD240XR – Rev. E buffUnderflow(1), buffNearEmpty(2), buffN

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-63 synthPLL(1), inputLevel(2), clockActivi

User Interfaces DD240XR High-Speed Digital Demodulator 4-64 MN-DD240XR – Rev. E STATUS current DESCRIPTION " When

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-65 ::= { test 2 } testEarlySyncLoss OBJECT-TYPE SYNTA

User Interfaces DD240XR High-Speed Digital Demodulator 4-66 MN-DD240XR – Rev. E " ::= { test 7 } testBitErrorRateMantissa OB

DD240XR High-Speed Digital Demodulator User Interfaces MN-DD240XR – Rev. E 4-67 -- radTerrEthMacAddr OBJECT-TYPE -- SYNTAX PhysAddress

User Interfaces DD240XR High-Speed Digital Demodulator 4-68 MN-DD240XR – Rev. E

DD240XR High-Speed Digital Demodulator Electrical Interfaces TM115 – Rev. 1.2 5-1 Electrical Interfaces 5 5.0 DD240XR Connections All DD240X

DD240XR High-Speed Digital Demodulator Table of Contents MN-DD240XR – Rev. E ix 5.12.1 ASI (ASI/DVB SPI and ASI/M2P Interfaces Only) ____________

Electrical Interfaces DD240XR High-Speed Digital Demodulator 5-2 MN-DD240XR – Rev. E 5.1 AC Power The unit is powered from a 100 – 240 VAC, 50 –

DD240XR High-Speed Digital Demodulator Electrical Interfaces MN-DD240XR – Rev. E 5-3 5.2.2 Firmware Update To upgrade the firmware, a Firmware

Electrical Interfaces DD240XR High-Speed Digital Demodulator 5-4 MN-DD240XR – Rev. E Table 5-2. Alarm Indications Alarm Pin Description None 1 –

DD240XR High-Speed Digital Demodulator Electrical Interfaces MN-DD240XR – Rev. E 5-5 5.9 J8 Ports J8 is the External Clock Input for the G.70

Electrical Interfaces DD240XR High-Speed Digital Demodulator 5-6 MN-DD240XR – Rev. E Table 5-5b. J8 − RS-422 Serial (ASI/RS530) Pin No. DVB Signal

DD240XR High-Speed Digital Demodulator Electrical Interfaces MN-DD240XR – Rev. E 5-7 5.13 ECL Interface 5.13.1 ECL Balanced (J8) The ECL Bala

Electrical Interfaces DD240XR High-Speed Digital Demodulator 5-8 MN-DD240XR – Rev. E Table 5-7. J8 − ECL Balanced 9-Pin Female Pin No. DVB Signal

DD240XR High-Speed Digital Demodulator Electrical Interfaces MN-DD240XR – Rev. E 5-9 MODE SELECTIONS: UDP PACKETS - the demodulator outputs seven

Electrical Interfaces DD240XR High-Speed Digital Demodulator 5-10 MN-DD240XR – Rev. E Multicast Destination IP Addresses When the destination add

DD240XR High-Speed Digital Demodulator Electrical Interfaces MN-DD240XR – Rev. E 5-11 PROG ETH FLASH: {PRESS CLEAR} The firmware resident on th